CGrADS Site Visit Participant - Keith Cooper

Professional Preparation

Keith Cooper
Professor
Department of Computer Science
Rice University

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Appointments:

• Professor, Department of Computer Science and Department of Electrical and Computer Engineering, Rice University, July 2000
• Associate Professor, Department of Computer Science, Rice University, June 1990 to June 2000
• Research Scientist, Department of Computer Science, Rice University, 1983 to June 1990

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Synergistic Activities

Dr. Cooper’s research group develops new compiler techniques and transfers them to both industry and academia. Methods developed in the group appear in compilers from Bops, Compaq, Ericsson, Hewlett- Packard, Ibm, Intel, Silicon Graphics, Sun Microsystems, and Texas Instruments. Most of his Ph.D.s accept positions in industry; he has placed students at Cray (Tera, head of the compiler group), Sun (head of the Hotspot compiler group), TI, Hewlett-Packard, LSI Logic, Dell, and Bops (manager of compiler development). The research compiler tools developed in the group have been used in both industry and academia, including studies at Sequent Computer, DEC (now Compaq), Michigan Technological University, University of Delaware, and Clemson. The implementations have been used in classes at CalTech and the University of Massachusetts.

The second major focus of Dr. Cooper’s group has been to improve the exchange of information between the compiler construction community and other groups— bringing outsiders into the community and applying code optimization methods in new domains. With Linda Torczon, he has written a textbook on introductory compiler construction; it will appear in print in March 2002 from Morgan Kaufmann. With Devika Subramanian and Linda Torczon, he has worked to apply techniques from arti•cial intelligence to scheduling and allocation. With John Bennett and Linda Torczon, he worked on ways to apply classic compiler optimizations to Vhdl-based circuits.

Dr. Cooper has been involved in outreach to K - 12 teachers. He has lectured several times in Richard Tapia’s GirlTech/Mcsa program—a summer institute that trains master teachers in technology while sensitizing them to the unique issues that arise in educating and retaining women and minorities. He has served as a pro bono consultant to several schools in the Houston area on classroom technology, on the role of technology in the curriculum, and on the low-level issues that arise in wiring schools.

Dr. Cooper has been active in his professional community. He served as Program Chair for the Acm Sigplan 98 Conference on Programming Language Design and Implementation and as Tutorials Chair for the same conference in 1993. He was a member of the Technical Steering Committee for the NSF-funded Center for Research on Parallel Computation from 1991 to 2000, and is currently a member of the Academic Planning and Coordination Committee for the Los Alamos Computer Science Institute. He served on the Policy Board of the Concurrent Supercomputing Consortium from 1991 to 1996.

Dr. Cooper was on the design team for Duncan Hall - the new Computational Engineering Building at Rice University. It houses four departments, several research centers, and a research institute. The building was designed to encourage collaboration - both within disciplines and across disciplines. It has become the hub of activity in the School of Engineering and the space used for most of the University’s programs that reach out to minorities, to women, and to educators from elementary and secondary schools.

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Related Publications:

1. “Operator Strength Reduction,” (with L.T. Simpson and C. Vick), Acm Transactions on Programming Languages and Systems (Toplas), to appear, 2001.
2. “Optimizing for Reduced Code Space Using Genetic Algorithms,” (with P. Schielke and D. Subramanian), Proceedings of the 1999 Acm Sigplan Workshop on Languages, Compilers, and Tools for Embedded Systems (Lctes), May 1999, Atlanta, GA, USA,.
3. “Enhanced Code Compression for Embedded RISC Processors,” (with N. McIntosh), Proceedings of the Acm Sigplan 99 Conference on Programming Language Design and Implementation, Atlanta, GA, USA, May 1999, pages 139-149.
4. “Compiler-controlledMemory,” (with T.J. Harvey), Proceedings of the Eighth International Conference on Architectural Support for Programming Languages and Systems (Asplos), San Jose, CA, USA, October 1998, pages 2-11.
5. “Practical Improvements to the Construction and Destruction of Static Single Assignment Form,” (with P. Briggs, T.J. Harvey, and L.T. Simpson), SoftwarePractice and Experience, 28(8), July 1998, pages 859-881.

Other Significant Publications and Patents:

1. “Non-local Instruction Scheduling with Limited Code Growth,” (with P.J. Schielke), Proceedings of the 1998 Acm Sigplan Workshop on Languages, Compilers, and Tools for Embedded Systems (Lctes), June 1998, Montreal, CA, pages 193-207.
2. “Live Range Splitting in a Graph Coloring Register Allocator,” (with L.T. Simpson), Proceedings of the 1998 International Conference on Compiler Construction (CC 99), March/April 1998, Lisbon, PT., pages 174-187.
3. “Combining Analyses, Combining Optimizations,” (with C. Click), Acm Transactions on Programming Languages and Systems (Toplas), 17(2), March 1995, pages 181-196.
4. “Improvements to Graph Coloring Register Allocation,” (with P. Briggs and L. Torczon), Acm Transactions on Programming Languages and Systems (Toplas), 16 (1994), pp. 428-455.
5. “Digital Computer Register Allocation and Code Spilling Using Interference Graph Coloring,” (with P. Briggs, K. Kennedy, and L. Torczon), Patent Number: 5.249.295.

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Collaborators:

Current Collaborators: John Bennett, Bradley Broom, Rob Fowler, Tim Harvey, John Mellor-Crummey, Ken Kennedy, Jan Sjodin, Devika Subramanian, and Linda Torczon (all at Rice), Dennis Gannon (Indiana U.), Fran Berman and Andrew Chien (UCSD), Carl Kesselman, (ISI,USC), Lennart Johnsson (U. of Houston), Dan Reed and Ruth Aydt (U. of Illinois, Urbana/Champagne), Jack Dongarra and Rich Wolski (U. of Tennessee), John Reynders (Sun), Rod Oldehoeft (and others from the Advanced Computing Lab at the Los Alamos National Laboratory), and all of the PIs on this proposal.

Recent Co-authors: (excluding those listed for other reasons): Kathryn McKinley (U. Mass.), Mary Hall (USC ISI), John Mellor-Crummey (Rice)

Thesis Advisees: Preston Briggs (Tera), Cli• Click (SUN Microsystems), L. Taylor Simpson (Intel), Nathaniel McIntosh (joint with K. Kennedy, Hewlett-Packard), John Lu (LSI Logic), Edmar Wienskoski (Motorola), Philip Schielke (Texas Instruments), Karim Esseghir (MS 93), Chris Vick (MS 94, SUN Microsystems), Jingsong He (MS 00, Dell), Li Xu, Tim Harvey, Todd Waterman

Thesis Advisor: Ken Kennedy (Rice University)

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